This invention relates to wave-shaping circuitry for controlling the electro-magnetic-interference (EMI) generated by an inductive load when the circuit driving the inductive load is being turned-off.
A problem which exists in the art, and which is resolved by the present invention, may be best explained by reference to the circuit of FIG. 1 which illustrates a prior art scheme for controlling the EMI generated by an inductive load. A double diffused metal-oxide-semiconductor (DMOS) field effect power transistor, T1, is used to apply power to a solenoid, S1; (i.e., T1 is a solenoid driver). The source-to-drain (i.e., conduction) path of T1 is shown connected between an output terminal 10 and a ground terminal 12. The solenoid (S1) includes inductance, represented by an inductor L1, and resistance represented by a resistor R1. The solenoid is connected between the output terminal 10 and the positive terminal 14 of a battery 16 whose negative terminal is returned to ground.
The turn-on and turn-off of T1 is controlled by a control circuit 18 having an input signal Ein. When Ein is low, transistor P3 is turned on and transistor N3 is turned off. When P3 is turned on, a turn-on current source I1 is mirrored via transistor P1 and P2 such that a current proportional to I1 flows into the gate electrode 11 of T1, turning it on. As is well known in the art, when T1 is turned on current flows from the power source 16 through the solenoid and the conduction path of T1 to ground.
The turn-off of T1 occurs when Ein goes high. Ein high, causes P3 to turn off and N3 to turn-on. When N3 is turned on, an off-current source I2 is mirrored via transistors N2 and N1. A current proportional to I2 then flows through the conduction paths of N3 and N1 discharging the gate 11 of T1 to ground. The current sources I1 and I2 control the charging and discharging rates of the gate-to-drain capacitance of T1 and hence the corresponding turn-on and turn-off slew rates at output terminal 10.
As is known in the art, when T1 is turned off and the current through the solenoid is interrupted, there is an inductive kick at output terminal 10. The inductive kick may produce a high positive going voltage at terminal 10 which is many times the amplitude (e.g., 200-1000 volts) of the battery voltage (e.g., 12 volts).
Transistor T1 is thus subjected to a very high voltage at its drain, 10, while its gate, 11, is being driven to zero volts (i.e., a cut-off condition). The breakdown voltage (BV) of T1 may be exceeded resulting in catastrophic failure. To protect T1, a zener protection network, such as network 17 shown in FIG. 1, may be connected between its gate and drain. In its simplest form, the protection network 17 would take the form of zener network 17b shown in FIG. 2 including a zener diode Za, a diode Di and a current limiting resistor R2 connected between the drain and gate of T1. Note that diode D1 is a "normal" blocking diode, not a zener, with its anode connected to the zener and its cathode coupled to the gate of T1. Diode D1 is necessary to prevent the "ON" gate drive current from being conducted into the drain of T1 through the forward biased zener, Za. Thus, D1 is poled to block conventional current flow from the gate into the drain of T1, while enabling conventional current flow from the drain into the gate of T1.
When the drain of T1 is driven to a high voltage which exceeds the zener voltage (Vz) of Za (e.g., 80 volts), Za conducts and raises the gate voltage of T1 tending to turn T1 back on and thereby limiting the drain voltage. The voltage fed back to the gate of T1 is then discharged to ground via the series connected conduction paths of N3 and N1 of network 18 (See FIG. 1) which mirror the current I2 through N2.
In addition to protecting T1, the zener, Za, provides a stable, accurate clamping voltage. In DMOS solenoid driver applications which use the DMOS voltage clamping region for solenoid turn-off, the zener yields a predictable turn-off voltage and turn-off time. That is, with a simple inductive load (neglecting the resistance R1) and a constant clamping voltage (V.sub.CL) the turn-off time (t.sub.off) of the inductor L1 may be expressed as: EQU t.sub.off =(L1)(I1)/V.sub.L eq. 1
where:
1. The voltage V.sub.L across the inductive load=V.sub.10 -V.sub.DD ; PA0 2. V.sub.10 =V.sub.CL =V.sub.Z +V.sub.D +V.sub.T ; and
V.sub.D is the forward voltage drop of diode D1; PA1 V.sub.T is the threshold voltage of transistor T1; PA1 V.sub.10 is the voltage at the drain of T1; PA1 V.sub.z is the zener voltage of Za; PA1 L1 is the inductance of the solenoid; and
I1 is the current through the inductor L1.
The zener diode Za is most often constructed from several zener diodes connected in series (as shown in FIG. 1) in order to achieve a higher clamping voltage (Vz) and, hence, faster turn-off times (see eq. 1).
Referring back to FIG. 1, eight zener diodes Z1 through Z8 are shown connected in series. Each zener could, for example, have a zener breakdown voltage (Vz) of 10 volts, whereby the total breakdown of the eight zeners would be 80 volts. In addition, where the zener voltage is not exactly the voltage required and the gate "turn-off" drive is a current source, a resistor R2 is connected in series with the zeners in the feedback (zener) path to create an additional voltage drop equal to the amplitude of the current therethrough times the value of R2. This additional voltage drop adds to the voltage provided by the zeners.
However, when a high inductive kick is produced and clamping is introduced, a significant amount of electro-magnetic radiation is produced primarily due to the sharp corner in the waveform when clamping occurs. A technique has been developed to reduce the electro-magnetic-interference (EMI) generated by the fast high voltage waveforms produced at the drain of T1. This technique includes the addition of capacitors (e.g., See C1, C5 in FIG. 1) across one or more of the zeners. It may also include the addition of a resistor such as R2, if not already present. The capacitors C1, C5 in FIG. 1 tend to short out the zeners (Z1, Z5) across which they are connected when zener breakdown first occurs. Thus, by way of example, the initial breakdown for the eight zeners diodes shown in FIG. 1 would be 60 volts, rather than 80 volts. This is so, since two zeners (Z1, Z5) are bypassed by capacitors (C1, C5) which initially function to shunt the zeners. Then, as current continues to flow, the by-pass capacitors (C1, C5) charge up and when the voltage across these capacitors exceeds the zener voltages of their corresponding zeners (Z1, Z5), the zeners clamp (or limit) the voltage to a total zener breakdown voltage of 80 volts. Thus, a gently rounded waveform is produced at the drain of T1 as its voltage approaches the maximum clamp voltage (e.g., 80 v), as shown in FIG. 3. The shape of the output signal (V.sub.10 in FIG. 3) may be referred to as a squared cosine waveshape. This waveshaping technique results in the production of an output having a gently rounded shape at the beginning of the turn-off waveform due to the natural slow turn-off characteristics of T1 and also a gently rounded shape at the top of the waveform as it approaches the clamp level due to the combination of the time constant for the resistor/capacitor network, the constant turn-off current, and the connection of one, or more, capacitors across one or more of the zeners.
A problem with the circuit of FIG. 1 is that the by-pass capacitor(s), once charged, will remain charged. That is, whenever T1 is turned-off, the by-pass capacitors (e.g., C1, C5) are charged up. Then, if T1 is subsequently turned-on and then turned-off, no benefit is derived from the by-pass capacitor(s), if the charge on the by-pass capacitors (C1, C5) has not leaked off or been discharged.
In a copending application titled "NETWORK FOR IMPROVING ELECTRO-MAGNETIC INTERFERENCE RESPONSE", bearing Ser. No. 09/024,203, which issued as U.S. Pat. No. 5,920,224 and which is assigned to the same assignee as this application applicant teaches that, where a number of zener diodes are connected in series between the output (e.g., drain) and control (e.g., gate) electrodes of a transistor, T1, and by-pass capacitors are connected across selected zener diodes to control the waveshape at the output when T1 is being turned-off, discharge diodes must be coupled in series with the by-pass capacitors to discharge them each time T1 is turned-on. Therefore, the by-pass capacitors are in a discharged condition whenever T1 is subsequently being driven to a turned-off condition, and each by-pass capacitor is capable of performing its designed by-pass function whenever T1 is being turned-off, after being turned-on.